使用介质隔离工艺研究出了模拟—数字兼容的350伏功率集成电路。使用纵向npn晶体管和新型的横向pnp晶体管获得了很好的互补电特性。同时,由于使用去除了晶体缺陷的特殊介质隔离片,因而降低了晶体管的噪声。此外,采用一种对称布局设计方法,获得了高精度的电阻。这种工艺技术已应用来开发通讯用的高压功率集成电路 Dielectric isolation processes have been used to develop analog-digitally compatible 350-volt integrated circuits. The use of vertical npn transistors and new lateral pnp transistors have yielded good complementary electrical characteristics. At the same time, transistor noise is reduced due to the use of special dielectric spacers that eliminate crystal defects. In addition, a symmetrical layout design is used to achieve high-precision resistance. This process technology has been used to develop high voltage power integrated circuits for communication