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Electric router is widely used for multi-core system to interconnect each other.However, with the increasing number of processor cores, the probability of communication conflict between proces-sor cores increases, and the data delay increases dramatically.With the advent of optical router, the traditional electrical interconnection mode has changed to optical interconnection mode.In the pack-et switched optical interconnection network, the data communication mechanism consists of 3 proces-ses:link establishment, data transmission and link termination, but the circuit-switched data trans-mission method greatly limits the utilization of resources.The number of micro-ring resonators in the on-chip large-scale optical interconnect network is an important parameter affecting the insertion loss.The proposed λ-route, GWOR, Crossbar structure has a large overall network insertion loss due to the use of many micro-ring resonators.How to use the least micro-ring resonator to realize non-blocking communication between multiple cores has been a research hotspot.In order to im-prove bandwidth and reduce access latency, an optical interconnection structure called multilevel switching optical network on chip ( MSONoC) is proposed in this paper.The broadband micro-ring resonators (BMRs) are employed to reduce the number of micro-ring resonators(MRs) in the net-work, and the structure can provide the service of non-blocking point to point communication with the wavelength division multiplexing ( WDM ) technology.The results show that compared to λ-route, GWOR, Crossbar and the new topology structure, the number of micro-ring resonators of MSONoC are reduced by 95.5%, 95.5%, 87.5%, and 60%respectively.The insertion loss of the minimum link of new topology, mesh and MSONoC structure is 0.73 dB, 0.725 dB and 0.38 dB.