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本文介绍一种由一层绝缘层隔离的两导电层间垂直互连的方法。该方法在对垂直通道墙壁实现完全的台阶覆盖方面和表面的平面化方面,具有目前采用方法所没有的优点。而且,这种方法很容易推广到互相绝缘的多个导电层间的互连。此外,当器件尺寸减小到一微米和亚微米水平时,使用这种平面化技术将改善器件的互连。这种方法肯定会在集成电子学方面得到应用,或许在集成光学和其它半导体器件方面也会得到应用。
This article describes a method of vertical interconnection between two conductive layers separated by a layer of insulating layer. This method has the advantages that are not currently available in terms of achieving full step coverage and surface planarization of vertical channel walls. Moreover, this method is easily generalized to the interconnection of multiple conductive layers insulated from each other. In addition, the use of such planarization techniques will improve device interconnection when the device size is reduced to one micron and submicron levels. This approach is sure to get used in integrated electronics and perhaps in integrated optics and other semiconductor devices.