论文部分内容阅读
着重介绍了基于VHDL综合的FPGA设计流程及FPGA设计中VHDL的编程方式,并以一个乘法器为设计实例,对几种设计方法进行比较,最后得出基于VHDL综合的Top—down的设计方法是FPGA设计中一种比较好的方法。
Focusing on VHDL synthesis based on the FPGA design process and FPGA design VHDL programming, and a multiplier for the design example of several design methods are compared, and finally come to VHDL synthesis based Top-down design method is FPGA design is a better way.