门级逻辑模拟主要用于检查逻辑图的正确性。它比寄存器传输级模拟得更细。我们以一台具体机器所用的元件为背景,设计了一个门级逻辑模拟程序。计算,打印出该机器节拍转换器的节拍波形,验证了逻辑设计的正确性。对于类似元件的逻辑,均可用本程序来进行模拟。对于其它性能的元件,本程序只要加入有关计算该元件性能的子程序,也可使用。 Gate logic simulation is mainly used to check the correctness of the logic diagram. It is finer than the register transfer level. We design a door-level logic simulation program based on the components used in a specific machine. Calculate and print out the beat waveform of this machine beat converter, which verifies the correctness of the logic design. The logic for similar components, can be used to simulate this program. For other performance components, this program can be used as long as the program to calculate the performance of the subroutine.