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本文讨论3.2×3.4mm~2的CVSD芯片内双极高压模拟器件与I~2L逻辑器件单片兼容的技术。该工艺采用在常规p-n结隔离双极IC基础上只增加一步深N~+扩散实现兼容,它是目前最简单的工艺方案。芯片采用5μ技术,集成286个元器件。除高压双极器件(BV_(ceo)≥25伏,β≥120)及I~2L注主逻辑单元器件外,还集成特殊结构二极管、扩散电阻、硼注入电阻及MOS电容等。本文侧重讨论高压双极器件晶体管与I~2L注入逻辑晶体管的参数匹配及工艺兼容,分析了p-n-p晶体管的小电流工作状态及器件结构、工艺的最佳化设计。同时对大阻值高精度的硼离子注入电阻的制作和修正技术也进行了讨论。还对影响电路参数的双层介质MOS电容的容量控制进行了分析。最后提出元器件的单片兼容结构及工艺方案,
This article discusses 3.2 × 3.4mm ~ 2 CVSD chip bipolar high voltage analog devices and I ~ 2L logic devices monolithic compatible technology. The process is based on the conventional p-n junction isolation bipolar IC based on only one step deeper N ~ + diffusion to achieve compatibility, it is the simplest process scheme. 5μ chip technology, integrated 286 components. In addition to high-voltage bipolar devices (BV_ (ceo) ≥ 25 V, β ≥ 120) and I ~ 2L note the main logic unit devices, but also integrated special structure diodes, diffusion resistance, boron injection resistance and MOS capacitors. This article focuses on the high-voltage bipolar transistor devices and I ~ 2L logic injection logic matching and compatible process, analysis of the p-n-p transistor current working conditions and device structure, process optimization design. At the same time, high resistance and high precision boron ion implantation resistance of the production and correction technology is also discussed. The capacity control of double layer dielectric MOS capacitors that affect the circuit parameters is also analyzed. Finally, the monolithic components compatible with the structure and process options,