对进位保留阵列乘法器提出了一种内建自测试方案。设计实现了采用累加器生成测试序列和压缩响应,并提出了一种改进的测试向量生成方法。分析与实验结果表明,该方案能实现非冗余固定型故障的完全覆盖。由于乘法器在数据通路中常伴有累加器,该方案通过对已有累加器的复用,作为测试序列生成和响应压缩,减少了硬件占用和系统性能占用,同时具有测试向量少、故障覆盖率高的特点。 A built-in self-test scheme is proposed for carry-hold array multipliers. Design and implementation of accumulator to generate test sequences and compression response, and proposed an improved test vector generation method. Analysis and experimental results show that this scheme can completely cover non-redundant fixed faults. Because the multiplier is often accompanied by an accumulator in the data path, this scheme generates and responds to compression by multiplexing the existing accumulators as a test sequence, reducing hardware occupation and system performance occupation while having less test vectors, fault coverage High rate of features.