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随着器件尺寸的缩小,离子注入和退火等制程的可变性开始引起器件阈值电压的显著变化。对此,器件制造商有两个选择:要么围绕可变性来设计制程,要么改变制程设备。本文将探讨在65至32nm节点下DRAM与逻辑器件的各种可选择方案。
As device sizes shrink, variability in processes such as ion implantation and annealing begins to cause significant changes in the device threshold voltage. Device manufacturers have two options for this: either design processes around variability or change process equipment. This article explores various options for DRAM and logic devices at 65nm to 32nm nodes.