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基于非均匀温度分布效应对互连延时的影响,提出了一种求解互连非均匀温度分布情况下的缓冲器最优尺寸的模型.给出了非均匀温度分布情况下的RC互连延时解析表达式,通过引入温度效应消除因子,得出了最优插入缓冲器尺寸以使互连总延时最优.针对90 nm和65 nm工艺节点,对所提模型进行了仿真验证,结果显示,相较于以往同类模型,本文所提模型由于考虑了互连非均匀温度分布效应,更加准确有效,且在保证互连延时最优的情况下有效地提高了芯片面积的利用.
Based on the effect of nonuniform temperature distribution on interconnect delay, a model of optimal buffer size for interconnecting inhomogeneous temperature distribution is proposed. The RC interconnection delay with non-uniform temperature distribution , The expression of temperature is eliminated and the optimal insertion buffer size is obtained to optimize the total delay of the interconnect by introducing the temperature effect elimination factor.The simulation results of the proposed model are validated for the 90 nm and 65 nm process nodes It shows that the proposed model is more accurate and effective than previous models because of consideration of the non-uniform temperature distribution in the interconnection, and effectively improves the utilization of the chip area while ensuring the optimal interconnection delay.