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介绍了一种应用于超低EMI无滤波D类音频功放的全差分运算放大器结构,可构成积分器,起滤除高次谐波的作用。该运算放大器采用两级结构来获得高增益,第一级为折叠共源共栅,偏置电路采用反馈结构,给整个运算放大器提供偏置电流,从而提高电路的电源抑制比;采用伪AB类输出级提高运放的瞬态响应,稳定运放输出。仿真结果表明,该电路具有良好的性能:增益为113dB,相位裕度为67°;单位增益带宽为1.9MHz,共模抑制比为160dB,电源抑制比为82.7dB;共模反馈环路增益为120dB,相位裕度为62°。
A fully differential operational amplifier architecture for ultra low EMI filterless Class D audio power amplifier is introduced, which can form an integrator and filter out higher harmonics. The operational amplifier adopts two-stage structure to obtain high gain. The first stage is folded cascode. The bias circuit adopts a feedback structure to provide bias current to the entire operational amplifier so as to improve the power supply rejection ratio of the circuit. Output stage to improve the transient response of op amp, stable op amp output. The simulation results show that the circuit has good performance: gain of 113dB, phase margin of 67 °; unity gain bandwidth of 1.9MHz, common mode rejection ratio of 160dB, power supply rejection ratio of 82.7dB; common-mode feedback loop gain of 120dB, phase margin of 62 °.