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叠层CSP封装已日益成为实现高密度、三维封装的重要方法。在叠层CSP封装工艺中,封装体将承受多次热载荷。因此,如果封装材料之间的热错配过大,在芯片封装完成之前,热应力就会引起芯片开裂和分层。详细地研究了一种典型四层芯片叠层CSP封装产品的封装工艺流程对芯片开裂和分层问题的影响。采用有限元的方法分别分析了含有高温过程的主要封装工艺中产生的热应力对芯片开裂和分层问题的影响,这些封装工艺主要包括第一层芯片粘和剂固化、第二、三、四层芯片粘和剂固化和后成模固化。在模拟计算中发现:(1)比较三步工艺固化工艺对叠层CSP封装可靠性的影响,第二步固化工艺是最可能发生失效危险的;(2)经过第一、二步固化工艺,封装体中发现了明显的应力分布特点,而在第三步固化工艺中则不明显。
Stacked CSP packages are increasingly becoming an important way to achieve high-density, three-dimensional packaging. In a stacked CSP packaging process, the package will withstand multiple thermal loads. Therefore, thermal stress can cause chip cracking and delamination before the chip package is completed if the thermal mismatch between the package materials is excessive. The effects of the packaging process of a typical four-layer chip-on-chip CSP packaging on chip cracking and delamination are investigated in detail. The finite element method is used to analyze the influence of thermal stress on the chip cracking and delamination caused by the main packaging process with high temperature process. The package process mainly includes the first chip adhesive curing, the second, third and fourth Layer chip adhesive curing and curing after molding. The simulation results show that: (1) The influence of the three-step process curing process on the reliability of the stacked CSP package is compared. The second step is the most likely to cause failure. (2) After the first and second curing processes, The package found in the obvious stress distribution characteristics, but in the third step curing process is not obvious.