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本文提出了采甩触发器对统一外时钟的状态方程来设计异步计数器的方法,明确了设计步骤,并给了设计实例。
In this paper, we propose a method of designing an asynchronous counter by using the state equation of a flip-flop to unify the external clock. The design steps are clear and examples of the design are given.