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本文以余三代码为基础提出一种串并行相结合的适用于台式电子计算机的运算器,文中简略地介绍了基于余三代码法,按二进制的全加器规则,求和及纠正和的规律,从而比较出在相同时钟频率下,比一般习惯采用的代码的计算速度快5倍。同时严密地用数学方法,推导出运算器的逻辑公式,根据公式,构成逻辑框图,及运算器的逻辑图,因对一位十进制(四位二进制)的数,采用并行方式进行运算,所以是一种串并行相结合的运算器,从而速度得到进一步提高。这样的方法,有利于提高运算的速度,同时由于没有增加设备。也有利于降低成本。在中小规模设备里,也可采用本运算器的原理来进行十——二进制运算的实现。
Based on the remaining three codes, this paper proposes a combination of serial and parallel computing unit suitable for desktop computers. In this paper, we briefly introduce the rule of three full codes, , Compared to the same clock frequency, faster than the commonly used code calculation speed 5 times. In the meantime, mathematical formulas are used to derive the logical formula of the calculator. According to the formula, the logical block diagram and the logic diagram of the calculator are formed. Since a decimal number (four binary digits) is used in parallel operation, A combination of parallel computing unit, so as to further improve the speed. This method is conducive to improving the speed of computing, at the same time as no additional equipment. Also help to reduce costs. In small and medium-sized equipment, the principle of this calculator can also be used to achieve the implementation of the ten-binary operation.