数字系统经常收到上升和下降时间长的输入信号,例如滤波器输出信号,数据传输装置信号,转换器输出信号和从变压器或振荡器取得的信号。从理论来说,集成逻辑元件的输入和输出间的高增益能引起一种矩形输出脉冲,与输入信号的上升和下降时间是无关的。但是,当输入信号的缓慢上升沿到达IC的转换开启电平时,它(指上升沿)开冶转换,电荷清除,使Vcc Digital systems often receive input signals that rise and fall long, such as filter output signals, data transfer unit signals, converter output signals, and signals taken from transformers or oscillators. In theory, the high gain between the input and output of the integrated logic can cause a rectangular output pulse, independent of the rise and fall times of the input signal. However, when the slow rising edge of the input signal reaches the IC turn-on level of the IC, it turns on (meaning the rising edge) to switch, clearing the charge, causing Vcc