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程序控制分频器在数字频率合成器中是使压控振荡器输出的频率降低到鉴相频率附近,同时通过改变其分频比达到改变合成器的工作频率。因此,程序分频器所能达到的最高工作频率的高低关系到鉴相频率的高低及信道间隔,从而影响环路的设计和合成器的指标。一直是数字式频率合成器中研制、分析的重点课题之一,本文介绍脉冲吞除程序分频的关键部分——高速变换模数的前置分频逻辑设计以及对程序分频的分析、讨论,同时介绍工作频率达120兆赫的脉冲吞除程序控制分频实际线路。
Program control divider in the digital frequency synthesizer is the voltage-controlled oscillator output frequency is reduced to near the phase frequency, while changing the frequency divider to change the operating frequency of the synthesizer. Therefore, the program divider can reach the maximum operating frequency of the high and low frequency of the phase frequency and channel spacing, thus affecting the loop design and synthesizer indicators. It has been one of the key topics in the research and analysis of digital frequency synthesizer. This paper introduces the key part of the pulse frequency demultiplication program - the design of pre-division logic of high-speed conversion modulus and the analysis of program frequency division, , While introducing a pulse-gating program that operates at 120 MHz to control the actual frequency-divided line.