本文把时分接线器(T接线器)表示成功能块的形式,在此基础上,导出了T接线器的一种测试算法。该算法生成测试序列的复杂性为: O(M_c×N)次写控制存储器+O(M_c)次遍读控制存储器其中N和M_c分别为控制存储器的字数和字长。实验结果表明:本文提出的算法能够较好地解决T接线器的自动测试问题,并已被应用于国产数字程控交换机的研制工作中。该算法还可推广到T接线器网络的测试。 In this paper, the time switch (T switch) represents the form of a successful block. On this basis, a test algorithm of the T switch is derived. The complexity of generating the test sequence by the algorithm is: O (M_c × N) write control memory + O (M_c) read-only control memory where N and M_c are the word-size and word-length of the control memory, respectively. The experimental results show that the algorithm proposed in this paper can solve the problem of automatic testing of T-switch and has been applied to the development of domestic digital program-controlled switches. The algorithm can also be extended to the T switch network testing.