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对于高速数字和射频应用来说,可以通过尽可能紧密地放置集成电路和无源元件来优化产品性能。芯片级封装(CSP)是电子行业为增加电路密度、提高性能和降低成本而积极采取的一项战略。具有25年设计和制造陶瓷厚膜电路经验的美国加州Hydelco公司,率先应用陶瓷技术制定批量生产陶瓷厚膜CSP用的低成本工艺。Hydelco公司的CSP采用激光加工的或者生瓷划片与冲制的96%氧化铝来形成定制基板。标准的通孔直径为100微米,中心间距为200微米。典型的CSP所占面积要比IC尺寸大20%。杜邦公司有许多材料可以用于这些产品,例如,杜邦4093是一种铂钯银厚膜导体材料,可以作为通孔填料和用于基板两面的导体焊
For high-speed digital and RF applications, product performance can be optimized by placing integrated circuits and passive components as closely as possible. Chip-scale packaging (CSP) is a strategy the electronics industry is actively pursuing to increase circuit density, improve performance and reduce costs. With 25 years of experience in the design and manufacture of ceramic thick-film circuits, California-based Hydelco Corporation pioneered the use of ceramic technology to develop low-cost processes for the mass production of ceramic thick-film CSPs. Hydelco’s CSP uses laser-machined or virgin scribing and punched 96% alumina to create a custom substrate. Standard through holes have a diameter of 100 microns and a center pitch of 200 microns. The typical CSP footprint is 20% larger than the IC size. DuPont has a number of materials available for these products. For example, DuPont 4093 is a platinum-palladium silver thick film conductor that can be used as a via filler and as a conductor for both sides of substrates