本文给出了一种高阶全数字锁相环的级联结构形式,它通过结构简单的全数字一阶环的级联来实现高阶环路。它避免了通常的高阶锁相环中较复杂的数字滤波器,实现简单,易于集成。本文介绍了级联全数字二阶环的原理和实现,对其性能进行了理论分析和计算机仿真,最后给出一个应用实例。 In this paper, a cascade structure of high-order all-digital phase-locked loop is presented, which realizes the high-order loop through concatenation of all-digital first-order loops with simple structure. It avoids the more complex digital filters found in typical higher-order phase-locked loops, making it simple and easy to integrate. This paper introduces the principle and implementation of cascaded all-digital second-order loop, analyzes its performance theoretically and computer simulation, and finally gives an application example.