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With greater flexibility and less cost, there is a trend that application specific instruction set processor(ASIP) will become the alternative implementation style to application of specific integrated circuit(ASIC). Architecture model is a key component in ASIP design flow. A novel ASIP model, xpMODEL, was presented. Its key features include: explicit specification of the memory subsystem allowing novel memory organizations and hierarchies; the introduction of meta-operator and instruction behavior extended finite state machine providing xpMODEL with ability to model execution sequencing, inherent parallelism, data/control/structural hazards, and out-of-order execution mode in ASIP. A comparison with other ASIP models shows the superiority of xpMODEL.
With greater flexibility and less cost, there is a trend that application specific instruction set processor (ASIP) will become the alternative implementation style to application of specific integrated circuit (ASIC). Architecture model is a key component in ASIP design flow. A novel ASIP model, xpMODEL, was presented. Its key features include: explicit specification of the memory subsystem enabling novel memory organizations and hierarchies; the introduction of meta-operator and instruction behavior extended finite state machine providing xpMODEL with ability to model execution sequencing, inherent parallelism, data / control / structural hazards, and out-of-order execution mode in ASIP. A comparison with other ASIP models shows the superiority of xpMODEL.