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本文讨论建立在Apollo DOMAIN系统上的一个从功能描述直接生成逻辑图的VLSI或硅编译器的逻辑设计自动化系统的构成和各组成部分的基本功能及特点.本系统包括寄存器传输级模拟,硬件逻辑翻译器,逻辑划分与函数(列阵)分解,两级逻辑综合与多级逻辑综合,自动生成逻辑图和逻辑模拟等五个主要软件.它们可以作为整个系统的组成部分,也可独立完成相应的功能. 本系统自动生成的逻辑图布局十分规整,连线也比较合理,并可通过交互系统进行布局和连线的修改.最后,生成的逻辑图还可以直接进行门和功能块级的逻辑模拟.
This paper discusses the construction of logic design automation system of VLSI or silicon compiler which is based on Apollo DOMAIN system and generates logic diagram directly from functional description and the basic functions and characteristics of each component.The system includes register transfer level simulation, hardware logic Translator, logic division and function (array) decomposition, two levels of logic synthesis and multi-level logic synthesis, automatically generated logic diagram and logic simulation of five major software. They can be used as part of the entire system can also be completed independently The system automatically generated logic diagram layout is very structured, the connection is also more reasonable, and through the interactive system layout and connection changes.Finally, the generated logic diagram can also be directly at the door and block logic level simulation.