Altera公司推出一个把FPGA体系结构与基于1.5V芯核电压的高性能3.215Gbps收发器组合在一起的器件系列,由此体现了对0.13μm硅加工工艺的高成本和高集成度需求的关切。这一Stratix GX器件系列的特点是,一个硬IP收发器被融合到该系列的FPGA体系结构中。这种FPGA体系结构有4～20个速率为3.125Gbp的高速串行通道。Stratix GX器件采用用户风险很小的第二代工艺。它是一种FPGA和千兆位兼而有之的解决方案,把底板用的专用电路纳入到 Altera Corporation has introduced a family of devices that combine an FPGA architecture with a high-performance 3.215Gbps transceiver based on a 1.5V core voltage to reflect the high cost and high integration requirements of a 0.13μm silicon process. A feature of this Stratix GX device family is the integration of a hard IP transceiver into this family of FPGA architectures. This FPGA architecture has 4-20 high-speed serial channels at 3.125 Gbp. Stratix GX devices incorporate second-generation technologies that have a low user risk. It is a FPGA and a gigabit solution that combines the dedicated circuitry for the backplane