定时时序数字化是一种新的定时器设计方法,文中先对定时时序的特点进行分析,再介绍定时时序的时间分割方法以及数字化的方法,最后结合MPU+FPGA的硬件设计模式实现了一种比较稳定规范的雷达定时器设计模式,缩短了设计周期,提高了设计质量,满足了雷达定时器设计的通用性的需求.“,”A method of digitalizing the time sequence of timer is a new timer design of radar. The paper describes the characteristics of the time sequence of the timer and a method of digitalizing the time sequences of timer that have marked the time value. In combination with the hardware design model of MPU+FPGA, the more stable and standardized radar timer is performed. The application of the method to radar timer design can shorten the design period, improve the quality and share in radar timer design.