为了配合高性能ASIC和微处理器的发展需要,W.L.Gore andAssociates(Newark,DE)公司声称开发了新型的半导体芯片封装。该封装如图所示(参看照片),被称为Via onChip Pitch(意思是:按照芯片的节距安排封装上的通孔节距);是采用光刻工艺技术,将该公司的Microlam介质材料和先进的通孔形成技术结合起来。该封装针对反转倒装芯片的封装应用要求,这类器件一般的凸起(bump)数目可达到4000个,凸起的间隔节距可低到230微米。 Via on Chip Pitch封装由于可 In line with the development needs of high-performance ASICs and microprocessors, W.L. Gore and Associates (Newark, DE) claims to have developed a new type of semiconductor chip package. The package, shown in the photo (see photo), is called Via onChip Pitch (meaning the pitch of the through-holes in the package is arranged according to the pitch of the die); a photolithographic process that uses the company’s Microlam dielectric material Combined with advanced through-hole formation technology. The package is targeted at flip-chip packaging applications requiring a typical bump count of up to 4,000 with raised pitch down to 230 microns. Via on Chip Pitch Package As Possible