论文部分内容阅读
本文介绍一个线路简单、性能良好并与固体组件匹配的磁芯存贮器读出放大器电路。它是根据“电流控制”概念构成的。该电路于1973年上模型机,1975年正式用于某某计算机。一、电路结构磁芯存贮器读出放大器的功能是将几十毫伏的磁芯读出信号,鉴别并放大成与固体组件相对应的数字信号:“1”信号为3v;“O”信号为0.3v。它一般有4～5级(如图1)。第一级使放大器与读出线阻抗匹配。第二、三级为差分放大器起鉴别与放大作用。第五级将放大后的信号进行电平变换,以适应固体组件的要求。为了不使电平变换电路影响差分
This article presents a core memory sense amplifier circuit with simple circuitry, good performance and matching with solid components. It is based on the concept of “current control”. The circuit in 1973 on the model machine, officially used in 1975 for a certain computer. First, the circuit structure Core memory read-out amplifier’s function is to tens of millivolts core read signal to identify and amplify the digital signal corresponding to the solid component: “1” signal is 3v; “O” The signal is 0.3v. It generally has 4 to 5 (Figure 1). The first stage matches the amplifier impedance with the sense line. The second, three for the differential amplifier from the role of identification and amplification. The fifth level of the amplified signal level conversion to meet the requirements of solid components. In order not to affect the level shift circuit differential