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门级逻辑模拟作为CAD技术的一个方面主要用于检查逻辑图的正确性,它是在逻辑图纸设计出来后,对门、触发器及它们之间互相联线所构成的网络进行的模拟。模拟的精度取决于状态值的选取和对模拟对象(如元件)的近似。目前,国内的模拟程序大多采用表驱动法,其状态值采用二值或三值,由于二值和三值模拟本身的缺陷,模拟受到了某些限制,精度也不够高,要解决这些问题,可采用多值模拟的办法,但存储量和运算量会相应地增加,复旦大学物理系的六值模拟能较好的克服二值或三值模拟的缺点。
Gate-level logic simulation as an aspect of CAD technology is mainly used to check the correctness of the logic diagram, which is a simulation of the network composed of gates, triggers and interconnections between them after the logic drawing is designed. The accuracy of the simulation depends on the selection of the state value and the approximation to the simulation object (eg component). At present, most of the simulation programs in our country use the table-driven method, and their state values are binary or three-valued. Due to the defects of the binary and the three-valued simulation, the simulation is limited by some limitations and the accuracy is not high enough. To solve these problems, Multi-value simulation can be used, but the amount of storage and computation will increase accordingly. The six-value simulation of Fudan University's physics department can overcome the shortcomings of binary or three-value simulation.