采用扫描电子显微镜和电学分析技术研究了电荷耦合器件(CCD)多晶硅层间绝缘介质对器件可靠性的影响。研究结果表明,常规热氧化工艺制作的多晶硅介质层,在台阶侧壁存在薄弱区,多晶硅层间击穿电压仅20V,器件在可靠性试验后容易因多晶硅层间击穿而失效。采用LPCVD淀积二氧化硅技术消除了多晶硅台阶侧壁氧化层薄弱区,其层间击穿电压大于129V,明显改善了器件可靠性。 The effect of charge-coupled device (CCD) polycrystalline interlayer dielectric on device reliability was studied by scanning electron microscopy and electrical analysis. The results show that the polycrystalline silicon dielectric layer made by the conventional thermal oxidation process has a weak area on the side wall of the step, and the breakdown voltage between the polycrystalline silicon layers is only 20V. After the reliability test, the device is likely to fail due to the breakdown between the polycrystalline silicon layers. LPCVD deposition of silicon dioxide technology to eliminate the side walls of the polysilicon oxide layer of weakness, the breakdown voltage between the layers is greater than 129V, significantly improved device reliability.