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基于绝热计算原理的能量回收电路是克服数字电路功耗CV2壁垒的有效途径,非绝热损失是能量回收电路的主要功耗来源,该文提出的IERL(ImprovedEnergyRecoveryLogic)电路以小电容节点的非绝热操作使大电容输出节点通过CMOS支路进行充电和回收,减少了输出节点的非绝热损失。采用IERL结构设计的反相器链和全加器电路经过了HSPICE验证,说明IERL电路能够实现复杂的逻辑运算和多级流水线操作,同时将电路的功耗与CMOS电路、PAL电路进行了比较,在10MHz和100MHz频率下,其功耗损失仅为CMOS电路和PAL电路功耗的35%和45%。
The energy recovery circuit based on the principle of adiabatic calculation is an effective way to overcome the CV2 barrier of the digital circuit. The non-adiabatic loss is the main power source of the energy recovery circuit. The improved energy recovery circuit (IERL) proposed in this paper uses the non-adiabatic operation of the small capacitance node The large capacitor output node is charged and recovered through the CMOS branch, reducing the non-adiabatic loss of the output node. The inverter chain and full adder circuit designed with IERL structure have been verified by HSPICE, which shows that IERL circuit can realize complex logic operation and multi-stage pipeline operation, at the same time, the power consumption of the circuit is compared with CMOS circuit and PAL circuit, At 10MHz and 100MHz, the power loss is only 35% and 45% of CMOS and PAL circuit power consumption.