提出了一种采用现场可编程门阵列器件FPGA实现定点IIR低通数字滤波器的方案,该方案采用只读存储器ROM查找表的位串行分布式算法,极大地减少硬件电路的规模,提高了电路的执行速度。以一个四阶IIR低通数字滤波器电路的实现为例,说明了设计过程,对所设计的电路进行了验证。结果表明,电路工作正确可靠,满足了设计要求。 A scheme to realize the fixed-point IIR low-pass digital filter using Field Programmable Gate Array (FPGA) device is proposed. The scheme adopts the bit-serial distributed algorithm of read-only memory ROM look-up table, which greatly reduces the size of the hardware circuit and improves Circuit execution speed. Taking a fourth-order IIR low-pass digital filter circuit as an example, the design process is illustrated and the circuit designed is validated. The results show that the circuit work is correct and reliable, to meet the design requirements.